Microcode Stuffing

I've been thinking a lot in he past few days.  First I wanted to establish a 32-bit microcode, instead of the current 24 bits.  Then I realized that I will need bigger EEPROMs than I already had, and decided to scrap the 32-bits.  Now, I think, I'll need to either take away some hardware capability or move to 32 bits.
This afternoon, I was thinking about how wide the microcode needs to be.  I decided to do a "final" estimate representing the architecture as it is now.  I came up with an estimate of 25 bits, just one over my target.  I have 2 microcode bits currently selecting whether to increment or decrement the stack pointer or increment the program counter.  If I need, I will probably reclaim one of those bits by making all SP increments or decrements happen in microcode.  Although this won't affect most instructions, it will add a cycle to every push, and more importantly add 2 cycles to every JSR, 1 cycle to every RET, and 5 cycles to every INT/RTI pair.
In other news, I have added another temporary register to the design in order to be able to use (zp),Y addressing.  This completely fills up the ALU buses, so no more registers can be added.  I'm also working on the simulator and a microcode assembler.

Once the microcode issues clear up, I can make a final block diagram. See you then!

Too Many Ideas

My mind is overflowing with ideas for the Hack Minimax.  Not only am I redesigning the memory mapping unit, I am also trying to figure out how I will generate video and generally communicate with the real world.  I also have plans to add another 8 bits to the microcode word, as my current 24 bits are packed extremely tight.  Also included in my thoughts are a retarget of the classic Small-C compiler and an assembler.
In other news, I finished my SUBLEQ simulation.  I found a 74181 Logisim library and have designed another vital chip - the 74161.
As to the calculator, I will be pretty busy this week but hope to start redesigning the interface over the weekend.
See you soon!

I'm back! (Again)

Sorry that I haven't posted for a while. I'll try to keep up.

I have decided, after reviewing the shortcomings of the previous platform (most notably that it doesn't support interrupts), to go with a different architecture. I apologize to all that came from the TECS forum and I promise that I will eventually write a Hack emulator.

In lieu of the Hack microarchitecture, I am going to use a 6502-based microcoded architecture.  For those who don't know, the 6502 is an 8-bit microprocessor that was very popular in its day.  I have a very nice design for the microarchitecture I just made about 30 minutes ago that fits into a 24-bit horizontal microcode.

I am also going to call a halt to all hardware until I inventory my already-owned chips, design schematics, and simulate them successfully.  To that extent, I am learning how to use Logisim by designing a test 8-bit SUBLEQ computer.  After that, I will need to design simulations of each individual MSI chip, then combine them in my simulation.

While I haven't posted in a while, I've been doing some thinking about the capabilities of the HM. I am designing a paging system and I/O extenders.

See you (hopefully) soon!